Color OLED module library  v0.5
Library for the WaveShare 0.96-inch color OLED (SSD1331) module
ssd1331_init.c
1 /*
2  * @file ssd1331_init.c
3  *
4  * @author Matthew Matz
5  *
6  * @version 0.9
7  *
8  * @copyright Copyright (C) Parallax, Inc. 2016. See end of file for
9  * terms of use (MIT License).
10  *
11  * @brief 0.96-inch RGB OLED display bitmap driver, see ssd1331_h. for documentation.
12  *
13  * @detail Please submit bug reports, suggestions, and improvements to
14  * this code to editor@parallax.com.
15  */
16 
17 
18 #include "ssd1331.h"
19 #include "simpletools.h"
20 
21 
22 
23 screen_t* ssd1331_init(char sdi, char sclk, char cs, char rs, char rst, int _width, int _height) {
24 
25  screen_t* dev = (screen_t*) malloc(sizeof(screen_t));
26  memset(dev, 0, sizeof(screen_t));
27 
28  dev->color_depth = 16; // Set the color depth 16 bits
29 
30  dev->dev_id = cs;
31  dev->dc_pin = rs;
32  dev->sdi_pin = sdi;
33  dev->clk_pin = sclk;
34  dev->rst_pin = rst;
35 
36  dev->rotation = 2;
37  dev->width = _width;
38  dev->height = _height;
39  dev->text_size = 1;
40  dev->text_wrap = 1;
41  dev->text_color = WHITE;
42  dev->bg_color = WHITE;
43 
44  dev->deviceDrawPixel = ssd1331_drawPixel;
45  dev->deviceDrawLine = ssd1331_drawLine; // Use if device has hardware accelerated line drawing (otherwise 0)
46  dev->deviceDrawFastHLine = ssd1331_drawFastHLine;
47  dev->deviceDrawFastVLine = ssd1331_drawFastVLine;
48  dev->deviceFillRect = ssd1331_fillRect; // Use if device has hardware accelerated filled rectagle drawing (otherwise 0)
49  dev->deviceCopyRect = ssd1331_copy;
50 
51  dev->deviceInterface = INTF_SPI_NO_BUFFER; // interface type (bit 1) (1-i2c/0-SPI) and buffer (bit 0) (0-yes/1-no)
52 
53  dev->deviceClearDisplay = ssd1331_clearDisplay;
54  dev->deviceResetDisplay = ssd1331_resetDisplay;
55  dev->deviceInvertDisplay = ssd1331_invertDisplay;
56  dev->deviceSleepWakeDisplay = ssd1331_sleepWakeDisplay;
57  dev->deviceScrollDisplay = ssd1331_scrollDisplay;
58 
59  // set up fonts
60  i2c *eeBus = i2c_newbus(28, 29, 0);
61  loadFonts(dev, eeBus);
62 
63  // set pin directions
64  set_direction(sclk, 1);
65  set_direction(sdi, 1);
66 
67  // CS low so it'll listen to us
68  low(cs);
69 
70  // Default to Byte mode
71  low(rs);
72 
73  // Reset the display
74  ssd1331_resetDisplay(dev);
75 
76  int mask_cs = (1 << cs);
77  int mask_sdi = (1 << sdi);
78  int mask_clk = (1 << sclk);
79  int mask_dc = (1 << rs);
80 
81  ssd1331_writeLockSet(dev->dev_id);
82 
83  // Initialization Sequence
84  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, SSD1331_CMD_DISPLAYOFF, 0); // 0xAE
85  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, SSD1331_CMD_SETREMAP, 0); // 0xA0
86  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, 0x72, 0); // RGB Color
87  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, SSD1331_CMD_STARTLINE, 0); // 0xA1
88  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, 0x00, 0);
89  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, SSD1331_CMD_DISPLAYOFFSET, 0); // 0xA2
90  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, 0x00, 0);
91  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, SSD1331_CMD_NORMALDISPLAY, 0); // 0xA4
92  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, SSD1331_CMD_SETMULTIPLEX, 0); // 0xA8
93  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, 0x3F, 0); // 0x3F 1/64 duty
94  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, SSD1331_CMD_SETMASTER, 0); // 0xAD
95  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, 0x8E, 0);
96  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, SSD1331_CMD_POWERMODE, 0); // 0xB0
97  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, 0x0B, 0);
98  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, SSD1331_CMD_PRECHARGE, 0); // 0xB1
99  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, 0x31, 0);
100  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, SSD1331_CMD_CLOCKDIV, 0); // 0xB3
101  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, 0xF0, 0); // 7:4 = Oscillator Frequency, 3:0 = CLK Div Ratio (A[3:0]+1 = 1..16)
102  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, SSD1331_CMD_PRECHARGEA, 0); // 0x8A
103  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, 0x64, 0);
104  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, SSD1331_CMD_PRECHARGEB, 0); // 0x8B
105  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, 0x78, 0);
106  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, SSD1331_CMD_PRECHARGEA, 0); // 0x8C
107  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, 0x64, 0);
108  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, SSD1331_CMD_PRECHARGELEVEL, 0); // 0xBB
109  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, 0x3A, 0);
110  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, SSD1331_CMD_VCOMH, 0); // 0xBE
111  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, 0x3E, 0);
112  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, SSD1331_CMD_MASTERCURRENT, 0); // 0x87
113  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, 0x06, 0);
114  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, SSD1331_CMD_CONTRASTA, 0); // 0x81
115  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, 0x91, 0);
116  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, SSD1331_CMD_CONTRASTB, 0); // 0x82
117  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, 0x50, 0);
118  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, SSD1331_CMD_CONTRASTC, 0); // 0x83
119  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, 0x7D, 0);
120  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, SSD1331_CMD_DISPLAYON, 0); //--turn on oled panel
121 
122  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, SSD1331_CMD_CLEAR, 0); // Clear the screen
123  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, 0x00, 0);
124  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, 0x00, 0);
125  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, _width - 1, 0);
126  ssd1331_writeByte(mask_cs, mask_sdi, mask_clk, mask_dc, _height - 1, 0);
127 
128  ssd1331_writeLockClear(dev->dev_id);
129 
130  pause(25);
131 
132  return dev;
133 }
134 
135 
136 void ssd1331_resetDisplay(screen_t* dev) {
137  // Toggle RST low to reset if pin is defined
138  if(dev->rst_pin >= 0 && dev->rst_pin < 32) {
139  high(dev->rst_pin);
140  pause(100);
141  low(dev->rst_pin);
142  pause(100);
143  high(dev->rst_pin);
144  pause(100);
145  }
146 }
147 
148 
149 
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